1. Field of the Invention
The present invention is related to a method of operating a PSRAM and related device, and more particularly, to a method of providing write recovery in a PSRAM and related device.
2. Description of the Prior Art
Random access memory (RAM) is a form of computer data storage. There are two main types of RAM: static RAM (SRAM) and dynamic RAM (DRAM). In DRAM, memory cells are essentially made up of a transistor and capacitor pair. The capacitor holds a high or low charge, and the transistor acts as a switch to allow the control circuitry on the chip to access or change the capacitor's state. Data are stored in the DRAM memory cells in the form of electric charges which need to be periodically refreshed. In SRAM, memory cells store data using flip-flops which do not need to be refreshed, thereby providing faster access time. However, an SRAM device generally is larger in size and consumes more power than a DRAM device.
A pseudo-static RAM (PSRAM) internally uses a cell structure of DRAM and is externally similar to SRAM, thereby combining the higher density of DRAM with the simpler control of SRAM. Refresh operation is also needed to prevent loss of data stored in memory cells . Awaiting period is required for writing a last bit of data into a PSRAM before issuing a precharge command and after a write cycle. Such waiting period is known as the write recovery time.
In the prior art PSRAM, a protection scheme is provided after a bit of a word line is selected for a write command. If the PSRAM is performing a dummy read before receiving the write command, the word line remains on for improving performance. However, the prior art protection scheme may fail to provide a sufficient write recovery time under such circumstance.